HMC848LC5 提供可编程输出电压的45 Gbps 1:4解复用器，采用***T封装 推荐新设计使用
优势和特点
支持高达45 Gbps的数据速率
半速率时钟输入
¼速率参考时钟输出
快速上升和下降时间： 25/21 ps
可编程差分输出电压摆幅： 300 - 1000 mVp-p
单电源： +3.3V
32引脚5x5mm ***T封装： 25mm²
产品详情
HMC848LC5是一款1:4解复用器，设计用于高达45 Gbps数据解串应用。 该器件使用半速率时钟的上升沿和下降沿来采样输入数据序列D0-D3，并将数据锁存至差分输出。 片上生成1/4速率时钟输出信号，可用来将数据读入其他器件。
HMC848LC5的所有时钟和数据输入/输出均采用CML并通过片内50 Ω端接至VCC，可采用直流或交流耦合。 HMC848LC5的输入和输出可采用差分或单端配置工作。 HMC848LC5还集成一个输出电平控制引脚VCTRL，可用于损耗补偿或信号电平优化。 HMC848LC5采用+3.3V单电源供电，提供符合ROHS标准的5x5 mm ***T封装。
应用
SONET OC-768
RF ATE应用
宽带测试和测量
串行数据传输高达45 Gbps
高速ADC接口
本产品单价较高 货期比较长 如有货期价格方面的问题可以随时咨询国宇航芯黄小姐 13632767652
另附英文资料
Features and Benefits
Supports Data Rates up to 45 Gbps
Half Rate Clock Input
Quarter Rate Reference Clock Output
Fast Rise and Fall Times: 25 / 21 ps
Programmable Differential Output Voltage Swing: 300 - 1000 mVp-p
Single Supply: +3.3V
32 Lead 5x5mm ***T Package: 25mm簡
Product Details
The HMC848LC5 is a 1:4 demultiplexer designed for data deserialization up to 45 Gbps. The device uses both rising and falling edges of the half-rate clock to sample the input data in sequence, D0-D3 and latches the data onto the differential outputs. A quarter-rate clock output generated on-chip can be used to clock the data into other devices.
All clock and data inputs / outputs of the HMC848LC5 are CML and terminated on-chip with 50 Ohms to the VCC, and may be DC or AC coupled. The inputs and outputs of the HMC848LC5 may be operated either differentially or single-ended. The HMC848LC5 also features an output level control pin, VCTRL, which allows for loss compensation or signal level optimization. The HMC848LC5 operates from a single +3.3V supply and is ***ailable in ROHS compliant 5x5 mm ***T package.
Applicati***
SONET OC-768
RF ATE Applicati***
Broadband Test & Measurement
Serial Data Tran***ission up to 45 Gbps
High Speed ADC Interfacing
深圳市国宇航芯科技有限公司
项目销售工程师 黄云艳
手机 13632767652
***1256290132
网址：ips-