ZestET1 Gigabit Ethernet FPGA Board，低成本高性能FPGA板
ZestET1 是一款低成本, 简单易用, 性能非常高的千兆以太网 TCP/IP 卸载引擎(TOE) FPGA模块，它提供通用的接口，能够以千兆速度快速将设备连接到以太网。它能够在每个方向上维持 100MBytes/s 的采样率。
Orange Tree&＃39;s proprietary GigExpedite chip "GigEx" is a TOE that handles all the Ethernet communicati*** protocols. This le***es the Spartan-3A FPGA completely free for the user&＃39;s application, and means the user doesn&＃39;t h***e to know anything about Ethernet protocols. With the main processing engine implemented in TOE ha***are, sustained data rates over 100MBytes/sec are achieved. You can read more about GigEx here.
With its low price point, ease of use and compact form factor (50mm x 75mm), the module is ideally suited to integration in embedded systems and OEM equipment. It features a user programmable Xilinx Spartan-3A FPGA with up to 1.4M system gates that are completely free for user programming.
The FPGA can be programmed from on-board Flash, Ethernet or JTAG, and is capable of running soft-core processors and higher level protocols such as GigE Vision and Industrial Ethernet. It can also be used as a programmable interface to external devices, for processing data on the fly, high speed processing of streaming data and controlling external devices.
Benefits
-
Low cost and easy to use with no detailed Ethernet networking knowledge required
-
Offers simple access to very fast data rates over Gigabit Ethernet without h***ing to integrate complex networking ha***are and software
-
Devices can communicate via Ethernet without using a processor or incurring processor overheads
-
Can be quickly and cost-effectively extended to application layer protocols
Features
-
More than 100MBytes/s sustained data rate in each direction over Gigabit Ethernet
-
High reliability and high stability ha***are Gigabit Ethernet TOE for UDP and TCP/IP offload
-
User programmable companion Spartan-3A FPGA supports low cost, soft core processor implementation and application layer protocols
-
Windows and Linux software support for configuring and communicating with the user FPGA
-
Logic cores for all FPGA interfaces
-
Reference designs (including C, VHDL and Verilog source)